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Project Summary

  Analyzed 6 days ago based on code collected 6 days ago.

The perl code (hdltags or vtags) creates tags for verilog/system verilog/vhdl code for browsing the code with functionalities similar to ctags

Current version supports Verilog and System-Verilog. VHDL would be supported soon! Only module names are tagged.

Usual ctags commands work:

vi −t tag : Start vi and position the cursor at the file and line where "tag" is defined.

:ta tag : Find a tag.

Ctrl-] : Find the tag under the cursor.

Ctrl-T : Return to previous location before jump to tag (not widely implemented).

To download checkout using svn, or send an email to hdltags@anurag-kumar.com

-Anurag

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In a Nutshell, hdltags...

 

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30 Day Summary Apr 19 2013 — May 19 2013

12 Month Summary May 19 2012 — May 19 2013

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