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transmem

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The aim of this project is to provide a framework for investigating hardware transactional memory (HTM) within the simics full-system simulator, using the x86 architecture. The project aims to achieve the following: Provide a simple module to start working with transactional memory. Ability to ... [More] send events to an external event monitor/simulator. Regression status: STAMP passes (with caveat noted in issue 1) The code here is very early alpha if not pre-alpha... you've been warned If you're still keen to try it, please follow the GettingStarted guide to learn how to use transmem. If you do use transmem please let us know, thanks. [Less]

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  0 reviews  |  0 users  |  3,094 lines of code  |  0 current contributors  |  Analyzed 2 days ago
  memory multicore simics simulation transactional manycore
 
 
 
 

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